The present invention relates to a CMOS integrated circuit device, for a data processing system, in which input and output interfaces are adapted to ECL levels (emitter coupled logic).
The CMOS semiconductor integrated circuit device with input and output interfaced with the ECL levels can be a static RAM of a Bi-CMOS constitution, in which memory cells are constituted by CMOS circuits to accomplish a high degree of integration and a low power consumption, and in which ECL circuits are used as input and output circuits is disclosed in Suzuki, Makoto et al, ISSCC 89, Digest of Technical Papers, pp. 32-33, Feb. 15, 1989.